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ASIC Design & Verification, Hardware Design Engineering
ASIC Design and Verification:
- ASIC design/verification (Verilog,VHDL,Vera, C/C++, Perl, Synopsys)
- FPGA design/verification (Verilog,VHDL, Synplicity)
- C/C++. Vera, Specman
- Architecture, Behavioral Modeling, Logic Design
- Synthesis and Static-Timing Analysis
- Design for Test (DFT), Internal Scan, Boundary Scan
- IC design (BICMOS, CMOS, analog, mixed signal)
- Physical Design, Place and Route, Layout
- Microprocessor design/verification
- Microprocessor design/verification
Hardware Design Engineering:
- Board level design and systems for Microprocessor based systems
- FPGA / CPLD Design, Xilinx, Altera
- Board Level Verification and Signal Integrity
- Orcad, Viewlogic, Mentor tools
- Block Diagram, Schematic Entry, Netlist, Layout, Board Physical Implementation
- Evaluation and Reference Board Design
- Test & Bring up, Diagnostics
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